patch-2.2.18 linux/arch/ppc/kernel/gemini_setup.c

• Lines: 84
• Date: Wed Nov 8 23:00:34 2000
• Orig file: v2.2.17/arch/ppc/kernel/gemini_setup.c
• Orig date: Sat Sep 9 18:42:33 2000

diff -u --new-file --recursive --exclude-from /usr/src/exclude v2.2.17/arch/ppc/kernel/gemini_setup.c linux/arch/ppc/kernel/gemini_setup.c
@@ -21,6 +21,7 @@
 #include <linux/blk.h>
 #include <linux/console.h>
 #include <linux/openpic.h>
+#include <linux/delay.h>
 
 #include <asm/system.h>
 #include <asm/pgtable.h>
@@ -29,6 +30,7 @@
 #include <asm/io.h>
 #include <asm/m48t35.h>
 #include <asm/gemini.h>
+#include <asm/processor.h>
 
 #include <asm/time.h>
 #include "local_irq.h"
@@ -166,8 +168,6 @@
 	ioremap( GEMINI_MPIC_ADDR, sizeof( struct OpenPIC ));
 }
 
-
-extern unsigned long loops_per_sec;
 extern int root_mountflags;
 extern char cmd_line[];
 
@@ -179,7 +179,7 @@
 	extern char cmd_line[];
 
 
-	loops_per_sec = 50000000;
+	loops_per_jiffy = 50000000/HZ;
 
 #ifdef CONFIG_BLK_DEV_INITRD
 	/* bootable off CDROM */
@@ -258,14 +258,6 @@
 	return clock;
 }
 
-
-#define L2CR_PIPE_LATEWR   (0x01800000)   /* late-write SRAM */
-#define L2CR_L2CTL         (0x00100000)   /* RAM control */
-#define L2CR_INST_DISABLE  (0x00400000)   /* disable for insn's */
-#define L2CR_L2I           (0x00200000)   /* global invalidate */
-#define L2CR_L2E           (0x80000000)   /* enable */
-#define L2CR_L2WT          (0x00080000)   /* write-through */
-
 void __init gemini_init_l2(void)
 {
 	unsigned char reg;
@@ -339,8 +331,7 @@
 			cache |= L2CR_L2WT;
 #endif
 		cache |= L2CR_PIPE_LATEWR|L2CR_L2CTL|L2CR_INST_DISABLE;
-		_set_L2CR(0);
-		_set_L2CR(cache|L2CR_L2I|L2CR_L2E);
+		_set_L2CR(cache|L2CR_L2E);
 	}
 }
 
@@ -390,7 +381,7 @@
 #define gemini_rtc_write(val,x)  (writeb((val),(GEMINI_RTC+(x))))
 
 /* ensure that the RTC is up and running */
-void __init gemini_time_init(void)
+long __init gemini_time_init(void)
 {
 	unsigned char reg;
 
@@ -401,6 +392,7 @@
 		gemini_rtc_write((reg & ~(M48T35_RTC_STOPPED)), M48T35_RTC_CONTROL);
 		gemini_rtc_write((reg | M48T35_RTC_SET), M48T35_RTC_CONTROL);
 	}
+	return 0;
 }
 
 #undef DEBUG_RTC
@@ -571,6 +563,6 @@
 	ppc_md.kbd_leds = NULL;
 	ppc_md.kbd_init_hw = NULL;
 #ifdef CONFIG_MAGIC_SYSRQ
-	ppc_md.kbd_sysrq_xlate = NULL;
+	ppc_md.sysrq_xlate = NULL;
 #endif
 }