patch-2.3.11 linux/arch/i386/kernel/traps.c

• Lines: 171
• Date: Mon Jul 19 17:40:12 1999
• Orig file: v2.3.10/linux/arch/i386/kernel/traps.c
• Orig date: Tue May 11 17:11:26 1999

diff -u --recursive --new-file v2.3.10/linux/arch/i386/kernel/traps.c linux/arch/i386/kernel/traps.c
@@ -65,8 +65,8 @@
 #define DO_ERROR(trapnr, signr, str, name, tsk) \
 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
 { \
-	tsk->tss.error_code = error_code; \
-	tsk->tss.trap_no = trapnr; \
+	tsk->thread.error_code = error_code; \
+	tsk->thread.trap_no = trapnr; \
 	force_sig(signr, tsk); \
 	die_if_no_fixup(str,regs,error_code); \
 }
@@ -80,8 +80,8 @@
 			goto out; \
 		/* else fall through */ \
 	} \
-	tsk->tss.error_code = error_code; \
-	tsk->tss.trap_no = trapnr; \
+	tsk->thread.error_code = error_code; \
+	tsk->thread.trap_no = trapnr; \
 	force_sig(signr, tsk); \
 	die_if_kernel(str,regs,error_code); \
 out: \
@@ -143,10 +143,8 @@
 		regs->esi, regs->edi, regs->ebp, esp);
 	printk("ds: %04x   es: %04x   ss: %04x\n",
 		regs->xds & 0xffff, regs->xes & 0xffff, ss);
-	store_TR(i);
-	printk("Process %s (pid: %d, process nr: %d, stackpage=%08lx)",
-		current->comm, current->pid, 0xffff & i, 4096+(unsigned long)current);
-
+	printk("Process %s (pid: %d, stackpage=%08lx)",
+		current->comm, current->pid, 4096+(unsigned long)current);
 	/*
 	 * When in-kernel, we also print out the stack and code at the
 	 * time of the fault..
@@ -201,6 +199,9 @@
 	spin_lock_irq(&die_lock);
 	printk("%s: %04lx\n", str, err & 0xffff);
 	show_registers(regs);
+
+spin_lock_irq(&die_lock);
+
 	spin_unlock_irq(&die_lock);
 	do_exit(SIGSEGV);
 }
@@ -249,8 +250,8 @@
 		return;
 	}
 	die_if_kernel("cache flush denied",regs,error_code);
-	current->tss.error_code = error_code;
-	current->tss.trap_no = 19;
+	current->thread.error_code = error_code;
+	current->thread.trap_no = 19;
 	force_sig(SIGSEGV, current);
 }
 
@@ -262,8 +263,8 @@
 	if (!(regs->xcs & 3))
 		goto gp_in_kernel;
 
-	current->tss.error_code = error_code;
-	current->tss.trap_no = 13;
+	current->thread.error_code = error_code;
+	current->thread.trap_no = 13;
 	force_sig(SIGSEGV, current);
 	return;
 
@@ -374,9 +375,9 @@
 			goto clear_TF;
 	}
 
-	/* Mast out spurious debug traps due to lazy DR7 setting */
+	/* Mask out spurious debug traps due to lazy DR7 setting */
 	if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
-		if (!tsk->tss.debugreg[7])
+		if (!tsk->thread.debugreg[7])
 			goto clear_dr7;
 	}
 
@@ -385,8 +386,8 @@
 		goto clear_dr7;
 
 	/* Ok, finally something we can handle */
-	tsk->tss.trap_no = 1;
-	tsk->tss.error_code = error_code;
+	tsk->thread.trap_no = 1;
+	tsk->thread.error_code = error_code;
 	force_sig(SIGTRAP, tsk);
 	return;
 
@@ -422,8 +423,8 @@
 	 */
 	task = current;
 	save_fpu(task);
-	task->tss.trap_no = 16;
-	task->tss.error_code = 0;
+	task->thread.trap_no = 16;
+	task->thread.error_code = 0;
 	force_sig(SIGFPE, task);
 }
 
@@ -453,7 +454,7 @@
 {
 	__asm__ __volatile__("clts");		/* Allow maths ops (or we recurse) */
 	if(current->used_math)
-		__asm__("frstor %0": :"m" (current->tss.i387));
+		__asm__("frstor %0": :"m" (current->thread.i387));
 	else
 	{
 		/*
@@ -486,6 +487,7 @@
 	pmd_t * pmd;
 	pte_t * pte;
 
+return;
 	/*
 	 * Allocate a new page in virtual address space, 
 	 * move the IDT into it and write protect this page.
@@ -570,12 +572,12 @@
 
 void set_tss_desc(unsigned int n, void *addr)
 {
-	_set_tssldt_desc(gdt_table+FIRST_TSS_ENTRY+(n<<1), (int)addr, 235, 0x89);
+	_set_tssldt_desc(gdt_table+__TSS(n), (int)addr, 235, 0x89);
 }
 
 void set_ldt_desc(unsigned int n, void *addr, unsigned int size)
 {
-	_set_tssldt_desc(gdt_table+FIRST_LDT_ENTRY+(n<<1), (int)addr, ((size << 3) - 1), 0x82);
+	_set_tssldt_desc(gdt_table+__LDT(n), (int)addr, ((size << 3)-1), 0x82);
 }
 
 #ifdef CONFIG_X86_VISWS_APIC
@@ -672,7 +674,7 @@
 {
 	if (readl(0x0FFFD9) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
 		EISA_bus = 1;
-	set_call_gate(&default_ldt,lcall7);
+
 	set_trap_gate(0,&divide_error);
 	set_trap_gate(1,&debug);
 	set_trap_gate(2,&nmi);
@@ -693,14 +695,20 @@
 	set_trap_gate(17,&alignment_check);
 	set_system_gate(SYSCALL_VECTOR,&system_call);
 
-	/* set up GDT task & ldt entries */
-	set_tss_desc(0, &init_task.tss);
-	set_ldt_desc(0, &default_ldt, 1);
-
-	/* Clear NT, so that we won't have troubles with that later on */
-	__asm__("pushfl ; andl $0xffffbfff,(%esp) ; popfl");
-	load_TR(0);
-	load_ldt(0);
+	/*
+	 * default LDT is a single-entry callgate to lcall7
+	 */
+	set_call_gate(&default_ldt,lcall7);
+
+	/*
+	 * on SMP we do not yet know which CPU is on which TSS,
+	 * so we delay this until smp_init(). (the CPU is already
+	 * in a reasonable state, otherwise we wouldnt have gotten so far :)
+	 */
+#ifndef __SMP__
+	cpu_init();
+#endif
+
 #ifdef CONFIG_X86_VISWS_APIC
 	superio_init();
 	lithium_init();