patch-2.3.20 linux/arch/i386/kernel/i8259.c

• Lines: 398
• Date: Thu Oct 7 10:17:08 1999
• Orig file: v2.3.19/linux/arch/i386/kernel/i8259.c
• Orig date: Mon Oct 4 15:49:29 1999

diff -u --recursive --new-file v2.3.19/linux/arch/i386/kernel/i8259.c linux/arch/i386/kernel/i8259.c
@@ -1,7 +1,6 @@
 #include <linux/config.h>
 #include <linux/ptrace.h>
 #include <linux/errno.h>
-#include <linux/kernel_stat.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
 #include <linux/ioport.h>
@@ -9,68 +8,23 @@
 #include <linux/timex.h>
 #include <linux/malloc.h>
 #include <linux/random.h>
-#include <linux/smp.h>
 #include <linux/smp_lock.h>
 #include <linux/init.h>
+#include <linux/kernel_stat.h>
 
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/bitops.h>
-#include <asm/smp.h>
 #include <asm/pgtable.h>
 #include <asm/delay.h>
 #include <asm/desc.h>
 
 #include <linux/irq.h>
 
-
-/*
- * Intel specific no controller code
- * odd that no-controller should be architecture dependent
- * but see the ifdef __SMP__ 
- */
-
-static void enable_none(unsigned int irq) { }
-static unsigned int startup_none(unsigned int irq) { return 0; }
-static void disable_none(unsigned int irq) { }
-static void ack_none(unsigned int irq)
-{
-#ifdef __SMP__
-	/*
-	 * [currently unexpected vectors happen only on SMP and APIC.
-	 *  if we want to have non-APIC and non-8259A controllers
-	 *  in the future with unexpected vectors, this ack should
-	 *  probably be made controller-specific.]
-	 */
-	ack_APIC_irq();
-#endif
-}
-
-/* startup is the same as "enable", shutdown is same as "disable" */
-#define shutdown_none	disable_none
-#define end_none	enable_none
-
-struct hw_interrupt_type no_irq_type = {
-	"none",
-	startup_none,
-	shutdown_none,
-	enable_none,
-	disable_none,
-	ack_none,
-	end_none
-};
-
-
-/*
- * This is the 'legacy' 8259A Programmable Interrupt Controller,
- * present in the majority of PC/AT boxes.
- * plus some generic x86 specific things if generic specifics makes
- * any sense at all.
- * this file should become arch/i386/kernel/irq.c when the old irq.c
- * moves to arch independent land
- */
 /*
+ * Common place to define all x86 IRQ vectors
+ *
  * This builds up the IRQ handler stubs using some ugly macros in irq.h
  *
  * These macros create the low-level assembly IRQ routines that save
@@ -79,7 +33,6 @@
  * interrupt-controller happy.
  */
 
-
 BUILD_COMMON_IRQ()
 
 #define BI(x,y) \
@@ -93,7 +46,7 @@
 
 /*
  * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
- * (these are usually mapped to vectors 0x20-0x30)
+ * (these are usually mapped to vectors 0x20-0x2f)
  */
 BUILD_16_IRQS(0x0)
 
@@ -126,9 +79,9 @@
  */
 BUILD_SMP_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
 BUILD_SMP_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
-BUILD_SMP_INTERRUPT(stop_cpu_interrupt,STOP_CPU_VECTOR)
 BUILD_SMP_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
 BUILD_SMP_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
+BUILD_SMP_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
 
 /*
  * every pentium local APIC has two 'local interrupts', with a
@@ -150,7 +103,7 @@
 	IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
 	IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
 
-static void (*interrupt[NR_IRQS])(void) = {
+void (*interrupt[NR_IRQS])(void) = {
 	IRQLIST_16(0x0),
 
 #ifdef CONFIG_X86_IO_APIC
@@ -164,17 +117,23 @@
 #undef IRQ
 #undef IRQLIST_16
 
+/*
+ * This is the 'legacy' 8259A Programmable Interrupt Controller,
+ * present in the majority of PC/AT boxes.
+ * plus some generic x86 specific things if generic specifics makes
+ * any sense at all.
+ * this file should become arch/i386/kernel/irq.c when the old irq.c
+ * moves to arch independent land
+ */
 
-
-
-static void enable_8259A_irq(unsigned int irq);
+void enable_8259A_irq(unsigned int irq);
 void disable_8259A_irq(unsigned int irq);
 
 /* shutdown is same as "disable" */
 #define end_8259A_irq		enable_8259A_irq
 #define shutdown_8259A_irq	disable_8259A_irq
 
-static void mask_and_ack_8259A(unsigned int);
+void mask_and_ack_8259A(unsigned int);
 
 static unsigned int startup_8259A_irq(unsigned int irq)
 { 
@@ -207,8 +166,8 @@
 
 /*
  * Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
- * boards the timer interrupt is not connected to any IO-APIC pin, it's
- * fed to the CPU IRQ line directly.
+ * boards the timer interrupt is not really connected to any IO-APIC pin,
+ * it's fed to the master 8259A's IR0 line only.
  *
  * Any '1' bit in this mask means the IRQ is routed through the IO-APIC.
  * this 'mixed mode' IRQ handling costs nothing because it's only used
@@ -224,22 +183,20 @@
 {
 	unsigned int mask = 1 << irq;
 	cached_irq_mask |= mask;
-	if (irq & 8) {
+	if (irq & 8)
 		outb(cached_A1,0xA1);
-	} else {
+	else
 		outb(cached_21,0x21);
-	}
 }
 
-static void enable_8259A_irq(unsigned int irq)
+void enable_8259A_irq(unsigned int irq)
 {
 	unsigned int mask = ~(1 << irq);
 	cached_irq_mask &= mask;
-	if (irq & 8) {
+	if (irq & 8)
 		outb(cached_A1,0xA1);
-	} else {
+	else
 		outb(cached_21,0x21);
-	}
 }
 
 int i8259A_irq_pending(unsigned int irq)
@@ -260,26 +217,141 @@
 }
 
 /*
+ * This function assumes to be called rarely. Switching between
+ * 8259A registers is slow.
+ */
+static inline int i8259A_irq_real(unsigned int irq)
+{
+	int value;
+	int irqmask = 1<<irq;
+
+	if (irq < 8) {
+		outb(0x0B,0x20);		/* ISR register */
+		value = inb(0x20) & irqmask;
+		outb(0x0A,0x20);		/* back to the IRR register */
+		return value;
+	}
+	outb(0x0B,0xA0);		/* ISR register */
+	value = inb(0xA0) & (irqmask >> 8);
+	outb(0x0A,0xA0);		/* back to the IRR register */
+	return value;
+}
+
+/*
  * Careful! The 8259A is a fragile beast, it pretty
  * much _has_ to be done exactly like this (mask it
  * first, _then_ send the EOI, and the order of EOI
  * to the two 8259s is important!
  */
-static void mask_and_ack_8259A(unsigned int irq)
+void mask_and_ack_8259A(unsigned int irq)
 {
-	cached_irq_mask |= 1 << irq;
+	unsigned int irqmask = 1 << irq;
+
+	/*
+	 * Lightweight spurious IRQ detection. We do not want
+	 * to overdo spurious IRQ handling - it's usually a sign
+	 * of hardware problems, so we only do the checks we can
+	 * do without slowing down good hardware unnecesserily.
+	 *
+	 * Note that IRQ7 and IRQ15 (the two spurious IRQs
+	 * usually resulting from the 8259A-1|2 PICs) occur
+	 * even if the IRQ is masked in the 8259A. Thus we
+	 * can check spurious 8259A IRQs without doing the
+	 * quite slow i8259A_irq_real() call for every IRQ.
+	 * This does not cover 100% of spurious interrupts,
+	 * but should be enough to warn the user that there
+	 * is something bad going on ...
+	 */
+	if (cached_irq_mask & irqmask)
+		goto spurious_8259A_irq;
+	cached_irq_mask |= irqmask;
+
+handle_real_irq:
 	if (irq & 8) {
-		inb(0xA1);	/* DUMMY */
+		inb(0xA1);		/* DUMMY - (do we need this?) */
 		outb(cached_A1,0xA1);
-		outb(0x62,0x20);	/* Specific EOI to cascade */
-		outb(0x20,0xA0);
+		outb(0x62,0x20);	/* 'Specific EOI' to master-IRQ2 */
+		outb(0x20,0xA0);	/* 'generic EOI' to slave */
 	} else {
-		inb(0x21);	/* DUMMY */
+		inb(0x21);		/* DUMMY - (do we need this?) */
 		outb(cached_21,0x21);
-		outb(0x20,0x20);
+		outb(0x20,0x20);	/* 'generic EOI' to master */
+	}
+	return;
+
+spurious_8259A_irq:
+	/*
+	 * this is the slow path - should happen rarely.
+	 */
+	if (i8259A_irq_real(irq))
+		/*
+		 * oops, the IRQ _is_ in service according to the
+		 * 8259A - not spurious, go handle it.
+		 */
+		goto handle_real_irq;
+
+	{
+		static int spurious_irq_mask = 0;
+		/*
+		 * At this point we can be sure the IRQ is spurious,
+		 * lets ACK and report it. [once per IRQ]
+		 */
+		if (!(spurious_irq_mask & irqmask)) {
+			printk("spurious 8259A interrupt: IRQ%d.\n", irq);
+			spurious_irq_mask |= irqmask;
+		}
+		irq_err_count++;
+		/*
+		 * Theoretically we do not have to handle this IRQ,
+		 * but in Linux this does not cause problems and is
+		 * simpler for us.
+		 */
+		goto handle_real_irq;
 	}
 }
 
+void init_8259A(int auto_eoi)
+{
+	unsigned long flags;
+
+	save_flags(flags);
+	cli();
+
+	outb(0xff, 0x21);	/* mask all of 8259A-1 */
+	outb(0xff, 0xA1);	/* mask all of 8259A-2 */
+
+	/*
+	 * outb_p - this has to work on a wide range of PC hardware.
+	 */
+	outb_p(0x11, 0x20);	/* ICW1: select 8259A-1 init */
+	outb_p(0x20 + 0, 0x21);	/* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
+	outb_p(0x04, 0x21);	/* 8259A-1 (the master) has a slave on IR2 */
+	if (auto_eoi)
+		outb_p(0x03, 0x21);	/* master does Auto EOI */
+	else
+		outb_p(0x01, 0x21);	/* master expects normal EOI */
+
+	outb_p(0x11, 0xA0);	/* ICW1: select 8259A-2 init */
+	outb_p(0x20 + 8, 0xA1);	/* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
+	outb_p(0x02, 0xA1);	/* 8259A-2 is a slave on master's IR2 */
+	outb_p(0x01, 0xA1);	/* (slave's support for AEOI in flat mode
+				    is to be investigated) */
+
+	if (auto_eoi)
+		/*
+		 * in AEOI mode we just have to mask the interrupt
+		 * when acking.
+		 */
+		i8259A_irq_type.ack = disable_8259A_irq;
+
+	udelay(100);		/* wait for 8259A to initialize */
+
+	outb(cached_21, 0x21);	/* restore master IRQ mask */
+	outb(cached_A1, 0xA1);	/* restore slave IRQ mask */
+
+	restore_flags(flags);
+}
+
 #ifndef CONFIG_VISWS
 /*
  * Note that on a 486, we don't want to do a SIGFPE on an irq13
@@ -307,7 +379,7 @@
  * IRQ2 is cascade interrupt to second interrupt controller
  */
 
-static struct irqaction irq2  = { no_action, 0, 0, "cascade", NULL, NULL};
+static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL};
 #endif
 
 
@@ -315,6 +387,8 @@
 {
 	int i;
 
+	init_8259A(0);
+
 	for (i = 0; i < NR_IRQS; i++) {
 		irq_desc[i].status = IRQ_DISABLED;
 		irq_desc[i].action = 0;
@@ -357,9 +431,9 @@
 #ifdef __SMP__	
 
 	/*
-	  IRQ0 must be given a fixed assignment and initialized
-	  before init_IRQ_SMP.
-	*/
+	 * IRQ0 must be given a fixed assignment and initialized,
+	 * because it's used before the IO-APIC is set up.
+	 */
 	set_intr_gate(IRQ0_TRAP_VECTOR, interrupt[0]);
 
 	/*
@@ -371,17 +445,15 @@
 	/* IPI for invalidation */
 	set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
 
-	/* IPI for CPU halt */
-	set_intr_gate(STOP_CPU_VECTOR, stop_cpu_interrupt);
-
 	/* self generated IPI for local APIC timer */
 	set_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
 
 	/* IPI for generic function call */
 	set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
 
-	/* IPI vector for APIC spurious interrupts */
+	/* IPI vectors for APIC spurious and error interrupts */
 	set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
+	set_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
 #endif	
 
 	/*
@@ -397,13 +469,3 @@
 	setup_irq(13, &irq13);
 #endif
 }
-
-#ifdef CONFIG_X86_IO_APIC
-void __init init_IRQ_SMP(void)
-{
-	int i;
-	for (i = 0; i < NR_IRQS ; i++)
-		if (IO_APIC_VECTOR(i) > 0)
-			set_intr_gate(IO_APIC_VECTOR(i), interrupt[i]);
-}
-#endif