patch-2.4.20 linux-2.4.20/drivers/video/sis/sis_main.h
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- Lines: 892
- Date:
Thu Nov 28 15:53:15 2002
- Orig file:
linux-2.4.19/drivers/video/sis/sis_main.h
- Orig date:
Fri Aug 2 17:39:45 2002
diff -urN linux-2.4.19/drivers/video/sis/sis_main.h linux-2.4.20/drivers/video/sis/sis_main.h
@@ -1,16 +1,22 @@
#ifndef _SISFB_MAIN
#define _SISFB_MAIN
-/* Comments and changes marked with "TW" by Thomas Winischhofer <tw@webit.com> */
+/* Comments and changes marked with "TW" by Thomas Winischhofer <thomas@winischhofer.net> */
+
+#include "vstruct.h"
/* ------------------- Constant Definitions ------------------------- */
-#undef LINUXBIOS /* turn on when use LINUXBIOS */
+#undef LINUXBIOS /* turn this on when compiling for LINUXBIOS */
#define AGPOFF /* default is turn off AGP */
+#define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
+
#define VER_MAJOR 1
-#define VER_MINOR 3
-#define VER_LEVEL 13
+#define VER_MINOR 5
+#define VER_LEVEL 7
+
+#include "sis.h"
/* TW: To be included in pci_ids.h */
#ifndef PCI_DEVICE_ID_SI_650_VGA
@@ -21,17 +27,13 @@
#endif
/* TW end */
-#define DEFAULT_MODE 3
-#define DEFAULT_LCDMODE 12
-#define DEFAULT_TVMODE 12
-#define MODE_INDEX_NONE 0 /* TW: index for mode=none */
-
#define MAX_ROM_SCAN 0x10000
-#define TURBO_QUEUE_CAP 0x80
-#define HW_CURSOR_CAP 0x40
-#define AGP_CMD_QUEUE_CAP 0x80
-#define VM_CMD_QUEUE_CAP 0x20
+#define HW_CURSOR_CAP 0x80
+#define TURBO_QUEUE_CAP 0x40
+#define AGP_CMD_QUEUE_CAP 0x20
+#define VM_CMD_QUEUE_CAP 0x10
+#define MMIO_CMD_QUEUE_CAP 0x08
/* For 300 series */
#ifdef CONFIG_FB_SIS_300
@@ -68,6 +70,19 @@
#define VB_PART4_ADR (0x14-0x30)
#define VB_PART4_DATA (0x15-0x30)
+#define SISSR SiS_Pr.SiS_P3c4
+#define SISCR SiS_Pr.SiS_P3d4
+#define SISDACA SiS_Pr.SiS_P3c8
+#define SISDACD SiS_Pr.SiS_P3c9
+#define SISPART1 SiS_Pr.SiS_Part1Port
+#define SISPART2 SiS_Pr.SiS_Part2Port
+#define SISPART3 SiS_Pr.SiS_Part3Port
+#define SISPART4 SiS_Pr.SiS_Part4Port
+#define SISPART5 SiS_Pr.SiS_Part5Port
+#define SISDAC2A SISPART5
+#define SISDAC2D (SISPART5 + 1)
+#define SISMISCR (SiS_Pr.RelIO + 0x1c)
+
#define IND_SIS_PASSWORD 0x05 /* SRs */
#define IND_SIS_COLOR_MODE 0x06
#define IND_SIS_RAMDAC_CONTROL 0x07
@@ -92,16 +107,14 @@
#define IND_SIS_SCRATCH_REG_CR37 0x37
#define IND_SIS_AGP_IO_PAD 0x48
-#define IND_BRI_DRAM_STATUS 0x63 /* PCI memory size offset */
+#define IND_BRI_DRAM_STATUS 0x63 /* PCI config memory size offset */
#define MMIO_QUEUE_PHYBASE 0x85C0
#define MMIO_QUEUE_WRITEPORT 0x85C4
#define MMIO_QUEUE_READPORT 0x85C8
-/* Eden Chen; TW */
#define IND_SIS_CRT2_WRITE_ENABLE_300 0x24
#define IND_SIS_CRT2_WRITE_ENABLE_315 0x2F
-/* ~Eden Chen; TW */
#define SIS_PASSWORD 0x86 /* SR05 */
#define SIS_INTERLACED_MODE 0x20 /* SR06 */
@@ -109,7 +122,7 @@
#define SIS_15BPP_COLOR_MODE 0x1
#define SIS_16BPP_COLOR_MODE 0x2
#define SIS_32BPP_COLOR_MODE 0x4
-#define SIS_DRAM_SIZE_MASK 0x3F /* SR14 */
+#define SIS_DRAM_SIZE_MASK 0x3F /* 300/630/730 SR14 */
#define SIS_DRAM_SIZE_1MB 0x00
#define SIS_DRAM_SIZE_2MB 0x01
#define SIS_DRAM_SIZE_4MB 0x03
@@ -122,7 +135,7 @@
#define SIS_DATA_BUS_64 0x01
#define SIS_DATA_BUS_128 0x02
-#define SIS315_DRAM_SIZE_MASK 0xF0 /* 315/640?/740? SR14 */
+#define SIS315_DRAM_SIZE_MASK 0xF0 /* 315 SR14 */
#define SIS315_DRAM_SIZE_2MB 0x01
#define SIS315_DRAM_SIZE_4MB 0x02
#define SIS315_DRAM_SIZE_8MB 0x03
@@ -139,7 +152,7 @@
#define SIS315_ASYM_DDR 0x02
#define SIS315_DUAL_CHANNEL_1_RANK 0x3
-#define SIS550_DRAM_SIZE_MASK 0x3F /* 550/650 SR14 */
+#define SIS550_DRAM_SIZE_MASK 0x3F /* 550/650/740 SR14 */
#define SIS550_DRAM_SIZE_4MB 0x00
#define SIS550_DRAM_SIZE_8MB 0x01
#define SIS550_DRAM_SIZE_16MB 0x03
@@ -157,7 +170,7 @@
#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
#define SIS_PCI_ADDR_ENABLE 0x80
-#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315 SR26 */
+#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/650/740 SR26 */
#define SIS_VRAM_CMDQUEUE_ENABLE 0x40
#define SIS_MMIO_CMD_ENABLE 0x20
#define SIS_CMD_QUEUE_SIZE_512k 0x00
@@ -175,8 +188,10 @@
#define SIS_VB_OUTPUT_LCD 0x20
#define SIS_VB_OUTPUT_CRT2 0x40
#define SIS_VB_OUTPUT_HIVISION 0x80
+
#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */
#define SIS_DRIVER_MODE 0x40
+
#define SIS_VB_COMPOSITE 0x01 /* CR32 */
#define SIS_VB_SVIDEO 0x02
#define SIS_VB_SCART 0x04
@@ -185,23 +200,21 @@
#define SIS_CRT1 0x20
#define SIS_VB_HIVISION 0x40
#define SIS_VB_DVI 0x80
-#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | SIS_VB_SCART | SIS_VB_HIVISION)
-#define SIS_LCD_PANEL_800X600 0x1 /* CR36 */
-#define SIS_LCD_PANEL_1024X768 0x2
-#define SIS_LCD_PANEL_1280X1024 0x3
-#define SIS_LCD_PANEL_1280X960 0x4
-#define SIS_LCD_PANEL_640X480 0x5
-#define SIS_LCD_PANEL_1600x1200 0x6 /* TW */
-#define SIS_LCD_PANEL_320x480 0x7 /* TW: FSTN */
-#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 */
-#define SIS_EXTERNAL_CHIP_SIS301 0x01
-#define SIS_EXTERNAL_CHIP_LVDS 0x02
-#define SIS_EXTERNAL_CHIP_TRUMPION 0x03
-#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04
-#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05
+#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
+ SIS_VB_SCART | SIS_VB_HIVISION)
+
+#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 */
+#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_TRUMPION 0x03 /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04 /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05 /* in CR37 << 1 ! */
+#define SIS310_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
+#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03 /* in CR37 << 1 ! */
+
#define SIS_AGP_2X 0x20 /* CR48 */
-#define BRI_DRAM_SIZE_MASK 0x70 /* PCI bridge */
+#define BRI_DRAM_SIZE_MASK 0x70 /* PCI bridge config data */
#define BRI_DRAM_SIZE_2MB 0x00
#define BRI_DRAM_SIZE_4MB 0x01
#define BRI_DRAM_SIZE_8MB 0x02
@@ -209,44 +222,99 @@
#define BRI_DRAM_SIZE_32MB 0x04
#define BRI_DRAM_SIZE_64MB 0x05
-// Eden Chen
#define HW_DEVICE_EXTENSION SIS_HW_DEVICE_INFO
#define PHW_DEVICE_EXTENSION PSIS_HW_DEVICE_INFO
#define SR_BUFFER_SIZE 5
#define CR_BUFFER_SIZE 5
-// ~Eden Chen
-int enable_dstn = 0;
+/* Useful macros */
+#define inSISREG(base) inb(base)
+#define outSISREG(base,val) outb(val,base)
+#define orSISREG(base,val) do { \
+ unsigned char __Temp = inb(base); \
+ outSISREG(base, __Temp | (val)); \
+ } while (0)
+#define andSISREG(base,val) do { \
+ unsigned char __Temp = inb(base); \
+ outSISREG(base, __Temp & (val)); \
+ } while (0)
+#define inSISIDXREG(base,idx,var) do { \
+ outb(idx,base); var=inb((base)+1); \
+ } while (0)
+#define outSISIDXREG(base,idx,val) do { \
+ outb(idx,base); outb((val),(base)+1); \
+ } while (0)
+#define orSISIDXREG(base,idx,val) do { \
+ unsigned char __Temp; \
+ outb(idx,base); \
+ __Temp = inb((base)+1)|(val); \
+ outSISIDXREG(base,idx,__Temp); \
+ } while (0)
+#define andSISIDXREG(base,idx,and) do { \
+ unsigned char __Temp; \
+ outb(idx,base); \
+ __Temp = inb((base)+1)&(and); \
+ outSISIDXREG(base,idx,__Temp); \
+ } while (0)
+#define setSISIDXREG(base,idx,and,or) do { \
+ unsigned char __Temp; \
+ outb(idx,base); \
+ __Temp = (inb((base)+1)&(and))|(or); \
+ outSISIDXREG(base,idx,__Temp); \
+ } while (0)
/* ------------------- Global Variables ----------------------------- */
/* Fbcon variables */
-static struct fb_info fb_info;
-static struct display disp;
-static int video_type = FB_TYPE_PACKED_PIXELS;
-static int video_linelength;
-static int video_cmap_len;
+static struct fb_info sis_fb_info;
+
+static struct display sis_disp;
+
+static int video_type = FB_TYPE_PACKED_PIXELS;
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
static struct display_switch sisfb_sw;
+#endif
+
static struct fb_var_screeninfo default_var = {
- 0, 0, 0, 0,
- 0, 0,
- 0,
- 0,
- {0, 8, 0},
- {0, 8, 0},
- {0, 8, 0},
- {0, 0, 0},
- 0,
- FB_ACTIVATE_NOW, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0,
- 0,
- FB_VMODE_NONINTERLACED,
- {0, 0, 0, 0, 0, 0}
+ xres: 0,
+ yres: 0,
+ xres_virtual: 0,
+ yres_virtual: 0,
+ xoffset: 0,
+ yoffset: 0,
+ bits_per_pixel: 0,
+ grayscale: 0,
+ red: {0, 8, 0},
+ green: {0, 8, 0},
+ blue: {0, 8, 0},
+ transp: {0, 0, 0},
+ nonstd: 0,
+ activate: FB_ACTIVATE_NOW,
+ height: -1,
+ width: -1,
+ accel_flags: 0,
+ pixclock: 0,
+ left_margin: 0,
+ right_margin: 0,
+ upper_margin: 0,
+ lower_margin: 0,
+ hsync_len: 0,
+ vsync_len: 0,
+ sync: 0,
+ vmode: FB_VMODE_NONINTERLACED,
+ reserved: {0, 0, 0, 0, 0, 0}
};
static struct {
u16 blue, green, red, pad;
-} palette[256];
+} sis_palette[256];
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
+static u32 pseudo_palette[17];
+#endif
+
static union {
#ifdef FBCON_HAS_CFB16
u16 cfb16[16];
@@ -257,7 +325,7 @@
#ifdef FBCON_HAS_CFB32
u32 cfb32[16];
#endif
-} fbcon_cmap;
+} sis_fbcon_cmap;
/* display status */
static int sisfb_off = 0;
@@ -265,45 +333,50 @@
static int sisfb_forcecrt1 = -1;
static int sisfb_inverse = 0;
static int sisvga_enabled = 0;
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
static int currcon = 0;
-/*karl*/
+#endif
+
+/* global flags */
static int sisfb_tvmode = 0;
static int sisfb_mem = 0;
+static int sisfb_pdc = 0;
+static int enable_dstn = 0;
+static int sisfb_accel = -1;
+static int sisfb_ypan = -1;
-static enum _VGA_ENGINE {
- UNKNOWN_VGA = 0,
- SIS_300_VGA,
- SIS_315_VGA,
-} sisvga_engine = UNKNOWN_VGA;
+VGA_ENGINE sisvga_engine = UNKNOWN_VGA;
-/* TW: These are to adapted to VGA_ENGINE type */
+/* TW: These are to adapted according to VGA_ENGINE type */
static int sisfb_hwcursor_size = 0;
static int sisfb_CRT2_write_enable = 0;
-/* mode-related variables */
-int sisfb_mode_idx = MODE_INDEX_NONE; /* (TW) was -1 */
-u8 sisfb_mode_no = 0;
-u8 sisfb_rate_idx = 0;
-
-int sisfb_crt2type = -1; /* TW: CRT2 type (for overriding autodetection) */
+int sisfb_crt2type = -1; /* TW: CRT2 type (for overriding autodetection) */
+int sisfb_tvplug = -1; /* PR: Tv plug type (for overriding autodetection) */
-int sisfb_queuemode = -1; /* TW: Use MMIO queue mode by default (310 series only) */
+int sisfb_queuemode = -1; /* TW: Use MMIO queue mode by default (310/325 series only) */
-/* data for sis components*/
+/* data for sis components */
struct video_info ivideo;
-// Eden Chen
+/* TW: For ioctl SISFB_GET_INFO */
+sisfb_info sisfbinfo;
+
+/* TW: Hardware extension; contains data on hardware */
HW_DEVICE_EXTENSION sishw_ext = {
- NULL, NULL, NULL, NULL,
+ NULL, NULL, FALSE, NULL, NULL,
0, 0, 0, 0, 0, 0, 0, 0, 0,
NULL, NULL, NULL, NULL,
- {0, 0, 0, 0}
+ {0, 0, 0, 0},
+ 0
};
-// ~Eden Chen
+
+/* TW: SiS private structure */
+SiS_Private SiS_Pr;
/* card parameters */
static unsigned long sisfb_mmio_size = 0;
-static u8 sisfb_caps = 0;
+static u8 sisfb_caps = 0;
typedef enum _SIS_CMDTYPE {
MMIO_CMD = 0,
@@ -317,118 +390,203 @@
const char *name;
} sisdev_list[] = {
{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_300, "SIS 300"},
- {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_540_VGA, "SIS 540"},
- {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630_VGA, "SIS 630"},
+ {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_540_VGA, "SIS 540 VGA"},
+ {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630_VGA, "SIS 630/730 VGA"},
{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315H, "SIS 315H"},
{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315, "SIS 315"},
- {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315PRO, "SIS 315Pro"},
- {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_550_VGA, "SIS 550"},
- {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, "SIS 650 VGA"},
+ {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315PRO, "SIS 315PRO"},
+ {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_550_VGA, "SIS 550 VGA"},
+ {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, "SIS 650/M650/651/740 VGA"},
{0, 0, NULL}
};
+#define MD_SIS300 1
+#define MD_SIS315 2
+
/* mode table */
-static const struct _sisbios_mode {
+/* NOT const - will be patched for 1280x960 mode number chaos reasons */
+struct _sisbios_mode {
char name[15];
u8 mode_no;
+ u16 vesa_mode_no_1; /* "SiS defined" VESA mode number */
+ u16 vesa_mode_no_2; /* Real VESA mode numbers */
u16 xres;
u16 yres;
u16 bpp;
u16 rate_idx;
u16 cols;
u16 rows;
+ u8 chipset;
} sisbios_mode[] = {
- {"none", 0xFF, 0, 0, 0, 0, 0, 0}, /* TW: for mode "none" */
- {"320x240x16", 0x56, 320, 240, 16, 1, 40, 15},
- {"320x480x8", 0x5A, 320, 480, 8, 1, 40, 30},
- {"320x480x16", 0x5B, 320, 480, 16, 1, 40, 30},
- {"640x480x8", 0x2E, 640, 480, 8, 1, 80, 30},
- {"640x480x16", 0x44, 640, 480, 16, 1, 80, 30},
- {"640x480x24", 0x62, 640, 480, 32, 1, 80, 30}, /* TW: That's for people who mix up color- and fb depth */
- {"640x480x32", 0x62, 640, 480, 32, 1, 80, 30},
- {"720x480x8", 0x31, 720, 480, 8, 1, 90, 30},
- {"720x480x16", 0x33, 720, 480, 16, 1, 90, 30},
- {"720x480x24", 0x35, 720, 480, 32, 1, 90, 30}, /* TW */
- {"720x480x32", 0x35, 720, 480, 32, 1, 90, 30},
- {"720x576x8", 0x32, 720, 576, 8, 1, 90, 36},
- {"720x576x16", 0x34, 720, 576, 16, 1, 90, 36},
- {"720x576x24", 0x36, 720, 576, 32, 1, 90, 36}, /* TW */
- {"720x576x32", 0x36, 720, 576, 32, 1, 90, 36},
- {"800x600x8", 0x30, 800, 600, 8, 2, 100, 37},
- {"800x600x16", 0x47, 800, 600, 16, 2, 100, 37},
- {"800x600x24", 0x63, 800, 600, 32, 2, 100, 37}, /* TW */
- {"800x600x32", 0x63, 800, 600, 32, 2, 100, 37},
- {"1024x768x8", 0x38, 1024, 768, 8, 2, 128, 48},
- {"1024x768x16", 0x4A, 1024, 768, 16, 2, 128, 48},
- {"1024x768x24", 0x64, 1024, 768, 32, 2, 128, 48}, /* TW */
- {"1024x768x32", 0x64, 1024, 768, 32, 2, 128, 48},
- {"1280x960x8", 0x7C, 1280, 960, 8, 1, 160, 60}, /* TW */
- {"1280x960x16", 0x7D, 1280, 960, 16, 1, 160, 60}, /* TW */
- {"1280x960x24", 0x7E, 1280, 960, 32, 1, 160, 60}, /* TW */
- {"1280x960x32", 0x7E, 1280, 960, 32, 1, 160, 60}, /* TW */
- {"1280x1024x8", 0x3A, 1280, 1024, 8, 2, 160, 64},
- {"1280x1024x16", 0x4D, 1280, 1024, 16, 2, 160, 64},
- {"1280x1024x24", 0x65, 1280, 1024, 32, 2, 160, 64}, /* TW */
- {"1280x1024x32", 0x65, 1280, 1024, 32, 2, 160, 64},
- {"1600x1200x8", 0x3C, 1600, 1200, 8, 1, 200, 75},
- {"1600x1200x16", 0x3D, 1600, 1200, 16, 1, 200, 75},
- {"1600x1200x24", 0x66, 1600, 1200, 32, 1, 200, 75}, /* TW */
- {"1600x1200x32", 0x66, 1600, 1200, 32, 1, 200, 75},
- {"1920x1440x8", 0x68, 1920, 1440, 8, 1, 240, 75},
- {"1920x1440x16", 0x69, 1920, 1440, 16, 1, 240, 75},
- {"1920x1440x24", 0x6B, 1920, 1440, 32, 1, 240, 75}, /* TW */
- {"1920x1440x32", 0x6B, 1920, 1440, 32, 1, 240, 75},
- {"\0", 0x00, 0, 0, 0, 0, 0, 0}
+#define MODE_INDEX_NONE 0 /* TW: index for mode=none */
+ {"none", 0xFF, 0x0000, 0x0000, 0, 0, 0, 0, 0, 0, MD_SIS300|MD_SIS315}, /* TW: for mode "none" */
+ {"320x240x16", 0x56, 0x0000, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS315},
+ {"320x480x8", 0x5A, 0x0000, 0x0000, 320, 480, 8, 1, 40, 30, MD_SIS315}, /* TW: FSTN */
+ {"320x480x16", 0x5B, 0x0000, 0x0000, 320, 480, 16, 1, 40, 30, MD_SIS315}, /* TW: FSTN */
+ {"640x480x8", 0x2E, 0x0101, 0x0101, 640, 480, 8, 1, 80, 30, MD_SIS300|MD_SIS315},
+ {"640x480x16", 0x44, 0x0111, 0x0111, 640, 480, 16, 1, 80, 30, MD_SIS300|MD_SIS315},
+ {"640x480x24", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_SIS300|MD_SIS315}, /* TW: That's for people who mix up color- and fb depth */
+ {"640x480x32", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_SIS300|MD_SIS315},
+ {"720x480x8", 0x31, 0x0000, 0x0000, 720, 480, 8, 1, 90, 30, MD_SIS300|MD_SIS315},
+ {"720x480x16", 0x33, 0x0000, 0x0000, 720, 480, 16, 1, 90, 30, MD_SIS300|MD_SIS315},
+ {"720x480x24", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_SIS300|MD_SIS315},
+ {"720x480x32", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_SIS300|MD_SIS315},
+ {"720x576x8", 0x32, 0x0000, 0x0000, 720, 576, 8, 1, 90, 36, MD_SIS300|MD_SIS315},
+ {"720x576x16", 0x34, 0x0000, 0x0000, 720, 576, 16, 1, 90, 36, MD_SIS300|MD_SIS315},
+ {"720x576x24", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_SIS300|MD_SIS315},
+ {"720x576x32", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_SIS300|MD_SIS315},
+ {"800x480x8", 0x70, 0x0000, 0x0000, 800, 480, 8, 1, 100, 30, MD_SIS315}, /* TW: 310/325 series only */
+ {"800x480x16", 0x7a, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_SIS315},
+ {"800x480x24", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS315},
+ {"800x480x32", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS315},
+#define DEFAULT_MODE 20 /* TW: index for 800x600x8 */
+#define DEFAULT_LCDMODE 20 /* TW: index for 800x600x8 */
+#define DEFAULT_TVMODE 20 /* TW: index for 800x600x8 */
+ {"800x600x8", 0x30, 0x0103, 0x0103, 800, 600, 8, 2, 100, 37, MD_SIS300|MD_SIS315},
+ {"800x600x16", 0x47, 0x0114, 0x0114, 800, 600, 16, 2, 100, 37, MD_SIS300|MD_SIS315},
+ {"800x600x24", 0x63, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
+ {"800x600x32", 0x63, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
+ {"1024x576x8", 0x71, 0x0000, 0x0000, 1024, 576, 8, 1, 128, 36, MD_SIS315}, /* TW: 310/325 series only */
+ {"1024x576x16", 0x74, 0x0000, 0x0000, 1024, 576, 16, 1, 128, 36, MD_SIS315},
+ {"1024x576x24", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_SIS315},
+ {"1024x576x32", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_SIS315},
+ {"1024x600x8", 0x20, 0x0000, 0x0000, 1024, 600, 8, 1, 128, 37, MD_SIS300 }, /* TW: 300 series only */
+ {"1024x600x16", 0x21, 0x0000, 0x0000, 1024, 600, 16, 1, 128, 37, MD_SIS300 },
+ {"1024x600x24", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_SIS300 },
+ {"1024x600x32", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_SIS300 },
+ {"1024x768x8", 0x38, 0x0105, 0x0105, 1024, 768, 8, 2, 128, 48, MD_SIS300 },
+ {"1024x768x16", 0x4A, 0x0117, 0x0117, 1024, 768, 16, 2, 128, 48, MD_SIS300 },
+ {"1024x768x24", 0x64, 0x013c, 0x0118, 1024, 768, 32, 2, 128, 48, MD_SIS300 },
+ {"1024x768x32", 0x64, 0x013c, 0x0118, 1024, 768, 32, 2, 128, 48, MD_SIS300 },
+ {"1152x768x8", 0x23, 0x0000, 0x0000, 1152, 768, 8, 1, 144, 48, MD_SIS300 }, /* TW: 300 series only */
+ {"1152x768x16", 0x24, 0x0000, 0x0000, 1152, 768, 16, 1, 144, 48, MD_SIS300 },
+ {"1152x768x24", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_SIS300 },
+ {"1152x768x32", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_SIS300 },
+ {"1280x720x8", 0x79, 0x0000, 0x0000, 1280, 720, 8, 1, 160, 45, MD_SIS315}, /* TW: 310/325 series only */
+ {"1280x720x16", 0x75, 0x0000, 0x0000, 1280, 720, 16, 1, 160, 45, MD_SIS315},
+ {"1280x720x24", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_SIS315},
+ {"1280x720x32", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_SIS315},
+ {"1280x768x8", 0x23, 0x0000, 0x0000, 1280, 768, 8, 1, 160, 48, MD_SIS315}, /* TW: 310/325 series only */
+ {"1280x768x16", 0x24, 0x0000, 0x0000, 1280, 768, 16, 1, 160, 48, MD_SIS315},
+ {"1280x768x24", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_SIS315},
+ {"1280x768x32", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_SIS315},
+#define MODEINDEX_1280x960 48
+ {"1280x960x8", 0x7C, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_SIS300|MD_SIS315}, /* TW: Modenumbers being patched */
+ {"1280x960x16", 0x7D, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_SIS300|MD_SIS315},
+ {"1280x960x24", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
+ {"1280x960x32", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
+ {"1280x1024x8", 0x3A, 0x0107, 0x0107, 1280, 1024, 8, 2, 160, 64, MD_SIS300|MD_SIS315},
+ {"1280x1024x16", 0x4D, 0x011a, 0x011a, 1280, 1024, 16, 2, 160, 64, MD_SIS300|MD_SIS315},
+ {"1280x1024x24", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
+ {"1280x1024x32", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
+ {"1400x1050x8", 0x26, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_SIS315}, /* TW: 310/325 series only */
+ {"1400x1050x16", 0x27, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_SIS315},
+ {"1400x1050x24", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
+ {"1400x1050x32", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
+ {"1600x1200x8", 0x3C, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_SIS300|MD_SIS315},
+ {"1600x1200x16", 0x3D, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_SIS300|MD_SIS315},
+ {"1600x1200x24", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
+ {"1600x1200x32", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
+ {"1920x1440x8", 0x68, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_SIS300|MD_SIS315},
+ {"1920x1440x16", 0x69, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_SIS300|MD_SIS315},
+ {"1920x1440x24", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
+ {"1920x1440x32", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
+ {"2048x1536x8", 0x6c, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_SIS315}, /* TW: 310/325 series only */
+ {"2048x1536x16", 0x6d, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_SIS315},
+ {"2048x1536x24", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_SIS315},
+ {"2048x1536x32", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_SIS315},
+ {"\0", 0x00, 0, 0, 0, 0, 0, 0, 0}
};
+/* mode-related variables */
+#ifdef MODULE
+int sisfb_mode_idx = MODE_INDEX_NONE; /* Don't use a mode by default if we are a module */
+#else
+int sisfb_mode_idx = -1; /* Use a default mode if we are inside the kernel */
+#endif
+u8 sisfb_mode_no = 0;
+u8 sisfb_rate_idx = 0;
+
+/* TW: CR36 evaluation */
+const USHORT sis300paneltype[] =
+ { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
+ LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
+ LCD_320x480, LCD_1024x768, LCD_1024x768, LCD_1024x768,
+ LCD_1024x768, LCD_1024x768, LCD_1024x768, LCD_1024x768 };
+
+const USHORT sis310paneltype[] =
+ { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
+ LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
+ LCD_1152x768, LCD_1400x1050,LCD_1280x768, LCD_1600x1200,
+ LCD_320x480, LCD_1024x768, LCD_1024x768, LCD_1024x768 };
+
static const struct _sis_crt2type {
- char name[6];
+ char name[10];
int type_no;
+ int tvplug_no;
} sis_crt2type[] = {
- {"NONE", 0},
- {"LCD", DISPTYPE_LCD},
- {"TV", DISPTYPE_TV},
- {"VGA", DISPTYPE_CRT2},
- {"none", 0}, /* TW: make it fool-proof */
- {"lcd", DISPTYPE_LCD},
- {"tv", DISPTYPE_TV},
- {"vga", DISPTYPE_CRT2},
- {"\0", -1}
+ {"NONE", 0, -1},
+ {"LCD", DISPTYPE_LCD, -1},
+ {"TV", DISPTYPE_TV, -1},
+ {"VGA", DISPTYPE_CRT2, -1},
+ {"SVIDEO", DISPTYPE_TV, TVPLUG_SVIDEO},
+ {"COMPOSITE", DISPTYPE_TV, TVPLUG_COMPOSITE},
+ {"SCART", DISPTYPE_TV, TVPLUG_SCART},
+ {"none", 0, -1},
+ {"lcd", DISPTYPE_LCD, -1},
+ {"tv", DISPTYPE_TV, -1},
+ {"vga", DISPTYPE_CRT2, -1},
+ {"svideo", DISPTYPE_TV, TVPLUG_SVIDEO},
+ {"composite", DISPTYPE_TV, TVPLUG_COMPOSITE},
+ {"scart", DISPTYPE_TV, TVPLUG_SCART},
+ {"\0", -1, -1}
};
+/* Queue mode selection for 310 series */
static const struct _sis_queuemode {
char name[6];
int type_no;
} sis_queuemode[] = {
- {"AGP", AGP_CMD_QUEUE},
- {"VRAM", VM_CMD_QUEUE},
- {"MMIO", MMIO_CMD},
- {"agp", AGP_CMD_QUEUE},
- {"vram", VM_CMD_QUEUE},
- {"mmio", MMIO_CMD},
- {"\0", -1}
+ {"AGP", AGP_CMD_QUEUE},
+ {"VRAM", VM_CMD_QUEUE},
+ {"MMIO", MMIO_CMD},
+ {"agp", AGP_CMD_QUEUE},
+ {"vram", VM_CMD_QUEUE},
+ {"mmio", MMIO_CMD},
+ {"\0", -1}
};
-static struct _sis_vrate {
+static const struct _sis_vrate {
u16 idx;
u16 xres;
u16 yres;
u16 refresh;
} sisfb_vrate[] = {
- {1, 640, 480, 60}, {2, 640, 480, 72}, {3, 640, 480, 75}, {4, 640, 480, 85},
- {5, 640, 480, 100}, {6, 640, 480, 120}, {7, 640, 480, 160}, {8, 640, 480, 200},
- {1, 720, 480, 60},
- {1, 720, 576, 50},
- {1, 800, 600, 56}, {2, 800, 600, 60}, {3, 800, 600, 72}, {4, 800, 600, 75},
- {5, 800, 600, 85}, {6, 800, 600, 100}, {7, 800, 600, 120}, {8, 800, 600, 160},
- {1, 1024, 768, 43}, {2, 1024, 768, 60}, {3, 1024, 768, 70}, {4, 1024, 768, 75},
- {5, 1024, 768, 85}, {6, 1024, 768, 100}, {7, 1024, 768, 120},
- {1, 1280, 1024, 43}, {2, 1280, 1024, 60}, {3, 1280, 1024, 75}, {4, 1280, 1024, 85},
- /* TW: Values for 1280x960 guessed */
- {1, 1280, 960, 43}, /* {1, 1280, 960, 60}, */
- {1, 1600, 1200, 60}, {2, 1600, 1200, 65}, {3, 1600, 1200, 70}, {4, 1600, 1200, 75},
- {5, 1600, 1200, 85},
- {1, 1920, 1440, 60},
+ {1, 640, 480, 60}, {2, 640, 480, 72}, {3, 640, 480, 75}, {4, 640, 480, 85},
+ {5, 640, 480,100}, {6, 640, 480, 120}, {7, 640, 480, 160}, {8, 640, 480, 200},
+ {1, 720, 480, 60},
+ {1, 720, 576, 58},
+ {1, 800, 480, 60}, {2, 800, 480, 75}, {3, 800, 480, 85},
+ {1, 800, 600, 56}, {2, 800, 600, 60}, {3, 800, 600, 72}, {4, 800, 600, 75},
+ {5, 800, 600, 85}, {6, 800, 600, 100}, {7, 800, 600, 120}, {8, 800, 600, 160},
+ {1, 1024, 768, 43}, {2, 1024, 768, 60}, {3, 1024, 768, 70}, {4, 1024, 768, 75},
+ {5, 1024, 768, 85}, {6, 1024, 768, 100}, {7, 1024, 768, 120},
+ {1, 1024, 576, 60}, {2, 1024, 576, 65}, {3, 1024, 576, 75},
+ {1, 1024, 600, 60},
+ {1, 1152, 768, 60},
+ {1, 1280, 720, 60}, {2, 1280, 720, 75}, {3, 1280, 720, 85},
+ {1, 1280, 768, 60},
+ {1, 1280, 1024, 43}, {2, 1280, 1024, 60}, {3, 1280, 1024, 75}, {4, 1280, 1024, 85},
+ {1, 1280, 960, 60},
+ {1, 1400, 1050, 60},
+ {1, 1600, 1200, 60}, {2, 1600, 1200, 65}, {3, 1600, 1200, 70}, {4, 1600, 1200, 75},
+ {5, 1600, 1200, 85}, {6, 1600, 1200, 100}, {7, 1600, 1200, 120},
+ /* TW: Clock values for 1920x1440 guessed (except for the first one) */
+ {1, 1920, 1440, 60}, {2, 1920, 1440, 70}, {3, 1920, 1440, 75}, {4, 1920, 1440, 85},
+ {5, 1920, 1440,100}, {6, 1920, 1440, 120},
+ /* TW: Clock values for 2048x1536 guessed */
+ {1, 2048, 1536, 60}, {2, 2048, 1536, 70}, {3, 2048, 1536, 75}, {4, 2048, 1536, 85},
+ {5, 2048, 1536,100},
{0, 0, 0, 0}
};
@@ -466,10 +624,10 @@
static unsigned long sisfb_heap_start;
static unsigned long sisfb_heap_end;
static unsigned long sisfb_heap_size;
-static SIS_HEAP sisfb_heap;
+static SIS_HEAP sisfb_heap;
// Eden Chen
-static struct _sis_TV_filter {
+static const struct _sis_TV_filter {
u8 filter[9][4];
} sis_TV_filter[] = {
{ {{0x00,0x00,0x00,0x40}, /* NTSCFilter_0 */
@@ -618,115 +776,134 @@
{0xFF,0xFF,0xFF,0xFF} }}
};
-static int filter = -1;
+static int filter = -1;
static unsigned char filter_tb;
//~Eden Chen
-/* ---------------------- Routine Prototype ------------------------- */
+/* ---------------------- Routine prototypes ------------------------- */
/* Interface used by the world */
-int sisfb_setup(char *options);
-static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
- struct fb_info *info);
-static int sisfb_get_var(struct fb_var_screeninfo *var, int con,
- struct fb_info *info);
-static int sisfb_set_var(struct fb_var_screeninfo *var, int con,
- struct fb_info *info);
-static int sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
- struct fb_info *info);
-static int sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
- struct fb_info *info);
-static int sisfb_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg, int con,
- struct fb_info *info);
+#ifndef MODULE
+int sisfb_setup(char *options);
+#endif
+
+static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
+ struct fb_info *info);
+static int sisfb_get_var(struct fb_var_screeninfo *var, int con,
+ struct fb_info *info);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
+static int sisfb_set_par(struct fb_info *info);
+#endif
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
+static int sisfb_set_var(struct fb_var_screeninfo *var, int con,
+ struct fb_info *info);
+static int sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
+ struct fb_info *info);
+static int sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
+ struct fb_info *info);
+#endif
+static int sisfb_ioctl(struct inode *inode, struct file *file,
+ unsigned int cmd, unsigned long arg, int con,
+ struct fb_info *info);
/* Interface to the low level console driver */
-int sisfb_init(void);
-static int sisfb_update_var(int con, struct fb_info *info);
-static int sisfb_switch(int con, struct fb_info *info);
-static void sisfb_blank(int blank, struct fb_info *info);
+int sisfb_init(void);
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
+static int sisfb_update_var(int con, struct fb_info *info);
+static int sisfb_switch(int con, struct fb_info *info);
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
+static int sisfb_blank(int blank, struct fb_info *info);
+#else
+static void sisfb_blank(int blank, struct fb_info *info);
+#endif
/* hardware access routines */
-void sisfb_set_reg1(u16 port, u16 index, u16 data);
-void sisfb_set_reg3(u16 port, u16 data);
-void sisfb_set_reg4(u16 port, unsigned long data);
-u8 sisfb_get_reg1(u16 port, u16 index);
-u8 sisfb_get_reg2(u16 port);
-u32 sisfb_get_reg3(u16 port);
-// Eden Chen
-//void sisfb_clear_DAC(u16 port);
-//void sisfb_clear_buffer(PHW_DEVICE_EXTENSION psishw_ext);
-// ~Eden Chen
+void sisfb_set_reg4(u16 port, unsigned long data);
+u32 sisfb_get_reg3(u16 port);
+
+/* 2D accelerator functions */
+extern int sisfb_initaccel(void);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
+extern void fbcon_sis_fillrect(struct fb_info *info, struct fb_fillrect *rect);
+extern void fbcon_sis_copyarea(struct fb_info *info, struct fb_copyarea *area);
+extern void cfb_imageblit(struct fb_info *info, struct fb_image *image);
+#endif
/* Internal routines */
-static void sisfb_search_mode(const char *name);
-static void sisfb_validate_mode(void);
-static u8 sisfb_search_refresh_rate(unsigned int rate);
-static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
- unsigned *blue, unsigned *transp,
- struct fb_info *fb_info);
-static int sis_setcolreg(unsigned regno, unsigned red, unsigned green,
- unsigned blue, unsigned transp,
- struct fb_info *fb_info);
-static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
- struct fb_info *info);
-static void sisfb_set_disp(int con, struct fb_var_screeninfo *var);
-static void sisfb_do_install_cmap(int con, struct fb_info *info);
+static void sisfb_search_mode(const char *name);
+static int sisfb_validate_mode(int modeindex);
+static u8 sisfb_search_refresh_rate(unsigned int rate);
+static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
+ unsigned blue, unsigned transp,
+ struct fb_info *fb_info);
+static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
+ struct fb_info *info);
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
+static void sisfb_set_disp(int con, struct fb_var_screeninfo *var, struct fb_info *info);
+static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
+ unsigned *blue, unsigned *transp,
+ struct fb_info *fb_info);
+static void sisfb_do_install_cmap(int con, struct fb_info *info);
+#endif
+static void sisfb_pre_setmode(void);
+static void sisfb_post_setmode(void);
+static void sisfb_crtc_to_var(struct fb_var_screeninfo *var);
-/* Chip-dependent Routines */
+/* Chipset-dependent Routines */
#ifdef CONFIG_FB_SIS_300
-static int sisfb_get_dram_size_300(void);
-//extern BOOLEAN SiSInit300(PHW_DEVICE_EXTENSION HwDeviceExtension);
-static void sisfb_detect_VB_connect_300(void);
-static void sisfb_get_VB_type_300(void);
-static int sisfb_has_VB_300(void);
-//extern BOOLEAN SiSSetMode(PHW_DEVICE_EXTENSION HwDeviceExtension,USHORT ModeNo);
+static int sisfb_get_dram_size_300(void);
+static void sisfb_detect_VB_connect_300(void);
+static void sisfb_get_VB_type_300(void);
+static int sisfb_has_VB_300(void);
#endif
#ifdef CONFIG_FB_SIS_315
-static int sisfb_get_dram_size_315(void);
-//extern BOOLEAN SiSInit310(PHW_DEVICE_EXTENSION HwDeviceExtension);
-static void sisfb_detect_VB_connect_315(void);
-static void sisfb_get_VB_type_315(void);
-static int sisfb_has_VB_315(void);
-//extern BOOLEAN SiSSetMode310(PHW_DEVICE_EXTENSION HwDeviceExtension, USHORT ModeNo);
+static int sisfb_get_dram_size_315(void);
+static void sisfb_detect_VB_connect_315(void);
+static void sisfb_get_VB_type_315(void);
+static int sisfb_has_VB_315(void);
#endif
-/* SetMode routines */
-
-// Eden Chen
-extern BOOLEAN SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo);
-extern BOOLEAN SiSInit(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void SetEnableDstn(void);
-// ~Eden Chen
-
-extern void SiSRegInit(USHORT BaseAddr);
-extern USHORT SiS_GetCH7005(USHORT tempbx);
-extern void SiS_SetCH7005(USHORT tempbx);
-extern void SiS_SetCHTVRegANDOR(USHORT tempax,USHORT tempbh);
-
-static void sisfb_pre_setmode(void);
-static void sisfb_post_setmode(void);
-static void sisfb_crtc_to_var(struct fb_var_screeninfo *var);
+/* TW: Sensing routines */
+void SiS_Sense30x(void);
+int SISDoSense(int tempbl, int tempbh, int tempcl, int tempch);
+void SiS_SenseCh(void);
+
+/* Routines from init.c/init301.c */
+extern void SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr);
+extern BOOLEAN SiSInit(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo);
+extern void SetEnableDstn(SiS_Private *SiS_Pr);
+extern void SiS_LongWait(SiS_Private *SiS_Pr);
+
+/* TW: Chrontel TV functions */
+extern USHORT SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern USHORT SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh);
+extern void SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime);
/* Export functions */
-static void sis_get_glyph(SIS_GLYINFO *gly);
-void sis_dispinfo(struct ap_data *rec);
-void sis_malloc(struct sis_memreq *req);
-void sis_free(unsigned long base);
+static void sis_get_glyph(struct fb_info *info, SIS_GLYINFO *gly);
+void sis_dispinfo(struct ap_data *rec);
+void sis_malloc(struct sis_memreq *req);
+void sis_free(unsigned long base);
/* heap routines */
-static int sisfb_heap_init(void);
-static SIS_OH *sisfb_poh_new_node(void);
-static SIS_OH *sisfb_poh_allocate(unsigned long size);
-static void sisfb_delete_node(SIS_OH *poh);
-static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh);
-static SIS_OH *sisfb_poh_free(unsigned long base);
-static void sisfb_free_node(SIS_OH *poh);
+static int sisfb_heap_init(void);
+static SIS_OH *sisfb_poh_new_node(void);
+static SIS_OH *sisfb_poh_allocate(unsigned long size);
+static void sisfb_delete_node(SIS_OH *poh);
+static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh);
+static SIS_OH *sisfb_poh_free(unsigned long base);
+static void sisfb_free_node(SIS_OH *poh);
/* routines to access PCI configuration space */
-BOOLEAN sisfb_query_VGA_config_space(PSIS_HW_DEVICE_INFO psishw_ext,
- unsigned long offset, unsigned long set, unsigned long *value);
-BOOLEAN sisfb_query_north_bridge_space(PSIS_HW_DEVICE_INFO psishw_ext,
- unsigned long offset, unsigned long set, unsigned long *value);
+BOOLEAN sisfb_query_VGA_config_space(PSIS_HW_DEVICE_INFO psishw_ext,
+ unsigned long offset, unsigned long set, unsigned long *value);
+BOOLEAN sisfb_query_north_bridge_space(PSIS_HW_DEVICE_INFO psishw_ext,
+ unsigned long offset, unsigned long set, unsigned long *value);
#endif
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)